The more compact consumer electronics become, the more important components that reliably protect them from electrostatic discharge (ESD). These tiny components protect electronics manufacturers from enormous costs and image damage.
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Electronic entertainment devices are at increasing risk of carrying damage from surge transients such as electrostatic discharges. As developers and designers of integrated circuits integrate more and more functions into their chipsets, their stability over electrostatic discharges significantly suffers, requiring the use of external ESD protection components. In order to guarantee the reliable function of electrical appliances throughout the entire life cycle, TSV diode arrays are recommended for protection: they are extremely compact, can be accommodated in increasingly compact circuits and also offer very low clamping voltages. This also enables modern integrated circuits to be secured.
Typical voltage levels of electrostatic discharge
The moment the user touches an electrical device with a different electrical potential than himself, the voltage at an input or output port, such as a headphone or USB port, discharges.
Under unfavorable circumstances, this can destroy the circuit. Nevertheless, many electronics manufacturers take this risk in order to offer consumer electronics more cost-effectively, to design more compactly and at the same time to be able to represent a wider range of functions.
This trend is forcing manufacturers of integrated circuits to make silicon components smaller and smaller. As a result, they are increasingly renouncing internal ESD protection components. According to the American trade organization Electrostatic Discharge Association, about 30 percent of device defects can now be attributed to ESD or electrical surges.
Circuit and device manufacturers use different ESD tests
The different test methods used by circuit and electronics manufacturers are of little help. The manufacturers of integrated circuits use an ESD test model (MIL-STD-883, Method 3015: Human Body Model) that refers to the production environment. Device manufacturers test on the basis of the user environment using a stricter model defined by the International Electro technical Commission (IEC).
In terms of numbers, this means that most circuit manufacturers test their products at 500 V using human body mode (HBM), while end device manufacturers test at 8000 V in accordance with the IEC 61000-4-2 standard.
The following table compares the ESD flows according to the human body model and the environmental ESDs listed in the IEC 61000-4-2 standard, to which consumers unknowingly expose their devices to:
Comparison of ESD flows
The comparison shows that the highest ESD level after the HBM is well below the ESD current level of the IEC61000-4-2 standard (shown in red). According to HBM, an 8 kV event results in a 5.6-fold higher current than under the IEC61000-4-2 standard. This means that a chipset that survives an HBM test does not survive in practice, where it is exposed to significantly higher voltages.
Because most circuit manufacturers only test at a maximum of 500 V. If such a chipset is exposed to almost a hundred times higher current by an 8 kV ESD transient in practice, its fate is sealed – unless ESD protection measures are taken. In the meantime, the test levels are even moving towards 20 to 30 kV, so that the "gap" between practice and test scenario is widening.
This underlines the growing need for effective ESD protection components.
Dynamic resistance defines the appropriate ESD protection
Figure 1:
An ideal solution minimizes intrinsical resistance so that a protective solution has the lowest impedance path to the mass during an overvoltage.Littelfuse
To ensure that endpoints continue to function reliably despite ESD, choosing the right ESD protection (usually referred to as the TVS diode array) is essential.
The critical parameter in the selection is the dynamic resistance. Each protective solution has an intrinsical resistance value related to its clamping properties. An ideal solution minimizes intrinsical resistance so that a protective solution has the lowest impedance path to the mass during an overvoltage. Figure 1 presents this fact. During an ESD event, the clamping device reduces the resistance value. If the resistance is high, a higher voltage is created according to U = I x R, so that the circuit is not sufficiently protected.
With low resistance, only a low voltage develops, which hardly loads the circuit, and the ESD protection component can derive the voltage from the circuit. Basically, silicon protectors provide the best ESD protection due to their inherent lower dynamic resistance compared to technologies such as polymers or ceramics.
Depending on the supplier, the dynamic resistance of silicon components is between 0.2 and 3.0 Ω, while the resistance of ceramic solutions is on average between 2 and 5 Ω.
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